From 4383c0ef6e6c7e0637d5027741777812bc25da95 Mon Sep 17 00:00:00 2001
From: Aaditya Dhruv <aadityadhruv@mailbox.org>
Date: Mon, 2 Jan 2023 17:39:03 +0530
Subject: todo complete: dxyn out of bounds handle

---
 src/lib.rs | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src/lib.rs')

diff --git a/src/lib.rs b/src/lib.rs
index b97bcd2..32c1cde 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -271,15 +271,16 @@ impl Chip {
     fn drw_dxyn(&mut self) {
         let x = self.registers[self.x] as u32 % WIDTH; //x-coord
         let y = self.registers[self.y] as u32 % HEIGHT; //y-coord
-        //TODO: Cover up for end of bounds
         //for every row 
         for i in 0..self.n  {
             //for every bit (column)
             for j in 0..8 {
                 //get idx in display
+                if (y + i as u32) < HEIGHT && (x + j) < WIDTH {
                 let idx = (((y + i as u32) * WIDTH) + x+j) as usize;
                 //XOR the bit
                 self.display[idx] ^= self.mem[(self.index + i as u16) as usize] as u16 >> (7 - j) & 1; //7 - j for reverse bit shifting
+                }
             }
         }
     }
-- 
cgit